ZHANG Sheng, HU Jian-min, CHAI Hong, FU Na. Design and Implementation of an 8-bit Model Computer Based on FPGA[J]. Journal of nanchang hangkong university(Natural science edition), 2010, 24(3): 21-26.
Citation:
ZHANG Sheng, HU Jian-min, CHAI Hong, FU Na. Design and Implementation of an 8-bit Model Computer Based on FPGA[J]. Journal of nanchang hangkong university(Natural science edition), 2010, 24(3): 21-26.
ZHANG Sheng, HU Jian-min, CHAI Hong, FU Na. Design and Implementation of an 8-bit Model Computer Based on FPGA[J]. Journal of nanchang hangkong university(Natural science edition), 2010, 24(3): 21-26.
Citation:
ZHANG Sheng, HU Jian-min, CHAI Hong, FU Na. Design and Implementation of an 8-bit Model Computer Based on FPGA[J]. Journal of nanchang hangkong university(Natural science edition), 2010, 24(3): 21-26.
Design and Implementation of an 8-bit Model Computer Based on FPGA
A simple 8-bit model computer is designed and implemented with EDA technology in FPGA chip,including instruction system,calculator,controller,memory,timing generator and the bus.It is designed,compiled and simulated under the Integrated Development Environment of QuartusⅡ 6.0,finally downloaded to the SOPC/EDA experimental platform for units and system testing.The experiment result meets the design requirements.
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